October 2005 to October 2008 PhD, University of Bristol, Department of Computer Science.

      • PhD titler “Error Tolerant Techniques for the improvement of Reliability and Yield” My thesis was completed in 6 parts:
        • A novel multiple-error correcting technique.
        • Anovel SRAM memory design with improved reliability using Built-In-Current-Sensors.
        • An innovative memory design to improve the fabrication yield while reducing the cost per chip.
        • A framework to cope with the reliability and yield trade-off in nanotechnology based circuits.
        • A multiple SEU tolerance FPGA.
        • Algorithmic level fault tolerance technique to cope with long duration transientsA novel multiple-error correcting technique.

October 2004 to September 2005: MSc in Advanced Computing “Global Computing and Multimedia” – University of Bristol. Thesis Title “A Novel Soft Error Tolerant Low Power RAM Architecture”. We analyzed H-tree RAM architecture and we propose to incorporate on chip coding to protect against soft errors. It resulted in significant power savings of more than 50% and more than 34% decrease in delay over traditional RAM architecture while the reliability is significantly improved. Thesis was published in the “Proceedings of the 20th Annual Symposium on Integrated Circuits and System Design SBCCI ‘07″ ISBN:978-1-59593-816-9 page(s) 300-305.


September 2000 to June 2004 BSc (Hons) in Computer Science and Informatics – Moscow Power Engineering Institute (Technical University) Moscow, Russia – MPEI (TU), with distinction – grade 96%. Bachelor thesis was completed in three parts:

      • Programming a microcontroller to linearise the inputs of a smart transmitter.
      • Create a database system for a private institute of 200 students.
      • Design a computer network for two offices in 1km distance with 20PC’s.


    • Roberts fund. University of Bristol. 02/2008
    • International Travel Grant. Royal Academy of Engineering. 09/2007
    • Scholarship for doctoral studies. University of Bristol, Department of Computer Science. 07/2007
    • International Travel Grant. Royal Academy of Engineering. 03/2007
    • Best paper award for the paper ”A Fault Tolerant Multiplier less Decimation Filter” appeared in the proceedings of International Conference on Embedded Systems, Mobile Communication and Computing, August 4th -5th 2006, Bangalore, India.
    • Scholarship. Misys Foundation. 03/2005
    • Top 10 students with excellent performance. Moscow Power Engineering Institute-Technical University 06/2004


    • Member IEEE
    • Member IEEE Computer Society
    • Member IEEE Circuits and Systems Society (CAS)